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- 12 x 12-bit Multiplier with Pipelined 26-bit Output Summer
- Summer has 26-bit Input Port Fully Independent from Multiplier
Inputs
- Cascadable to Form Video Rate FIR Filter with 3-bit Headroom
- A, B, and C Input Registers Separately Enabled for Maximum
Flexibility
- 28 MHz Data Rate for FIR Filtering Applications
- High Speed, Low Power CMOS Technology
- 84-pin PLCC, J-Lead
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For
more INFORMATION: 1-408-542-5400
or  |
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| Part
Number |
Package |
Mechanical
Drawing |
|
LMS12JC35
LMS12JC40 |
Plastic J-Lead Chip
Carrier 84-pins |
J3 |
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| *Adobe
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file format. |
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